Single Slope Adc Block Diagram. Figure2a shows the single slope adcs in a cis system consisting of a global ramp generator comparators and up down counters. The column parallel single slope adc ss adc architecture is widely adopted for cis because of its simplicity low power consumption and high linearity.
The piece wise linear ramp transfer function. These similarities can be seen in the conceptual diagram of a single slope system infigure 2. The block diagram of a single slope adc is shown in figure 2.
The accurate correspondence of this adc s output with its input is dependent on the voltage slope of the integrator being matched to the counting rate of the counter the clock frequency.
Figure2a shows the single slope adcs in a cis system consisting of a global ramp generator comparators and up down counters. The logic diagram for the same is shown below. These similarities can be seen in the conceptual diagram of a single slope system infigure 2. Iii approval of the thesis.
