Sar Adc Diagram. The functional block diagram of successive approximation type of adc is shown below. While extremely fast 8 bit flash adcs or their folding interpolation variants exist with sampling rates as high as 1 5gsps e g the max104 max106 and max108 it is much harder to find a 10 bit flash adc.
The article is great if you want a more in depth explanation here is my plan for each of the blocks. Successive approximation type analog to digital converter the main part of the circuit is the 8 bit sar whose output is given to an 8 bit d a converter. Visual sar adc block diagram.
The equivalent analog output voltage of dac vd is applied to the non inverting input of the comparator.
Figure 2 the sample and hold s h is used to store the input analog value for the conversion phase. A successive approximation adc is a type of analog to digital converter that converts a continuous analog waveform into a discrete digital representation via a binary search through all possible quantization levels before finally converging upon a digital output for each conversion. The primary trade off between a flash adc s speed is the sar adc s significantly lower power consumption and smaller form factor. It uses an efficient code search strategy to complete n bit conversion in just n clock periods.
