Programmable Logic Array Diagram. So the top wire is x2 and the one just below is its negation x2. It has 2 n and gates for n input variables and for m outputs from pla there should be m or gates each.
The next part is to draw a vertical wire with an and gate. The block diagram of pla is shown in the following figure. Programmable logic array pla.
Submitted by saurabh gupta on february 12 2021.
That means each and gate has both normal and complemented inputs of variables. Block diagram of programmable array logic. Each variable is hooked to a wire and to a wire with a not gate. Here the inputs of and gates are programmable.
