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Programmable Frequency Divider Circuit

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Programmable Frequency Divider Circuit. The programmable frequency divider consists of a dual modulus prescaler dmp a programmable p counter and a swallow s counter. The prl 257 8 is an ac coupled input manually programmable two phase frequency divider with two sets of complementary necl outputs.

Dynamic Programmable Clock Divider Download Scientific Diagram
Dynamic Programmable Clock Divider Download Scientific Diagram from www.researchgate.net

The circuit can be pro grammed to divide from n 1 to n 4 in the 400 mhz to 6 ghz input frequency range. It has a common divide by 8 pre scalar front end followed by two banks of independent manually programmable dividers φ1and φ2. It is a key component of a frequency synthesizer.

The dual modulus prescaler is based on both synchronous and asynchronous divider which scales the input frequency to a lower frequency to ease the complexity of asynchronous resettable modulo pand modulo scounters.

It has a common divide by 8 pre scalar front end followed by two banks of independent manually programmable dividers φ1and φ2. It is a key component of a frequency synthesizer. Fractional clock frequency dividers are a special type of divider circuits where the dividing factor is a fraction. The circuit was designed to divide the frequency of a ttl compatible square wave signal which can be programmed with the use of three 7490 to perform the required operation.

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