Pipeline Adc Block Diagram. The residual to the full operating range of the next stage. The goal of this work was to design a pipeline analog to digital converter that can be calibrated and corrected in the digital domain.
The goal of this work was to design a pipeline analog to digital converter that can be calibrated and corrected in the digital domain. Figure 1 shows a block diagram of a 12 bit pipelined adc. Adc1 module block diagram an5 an42 ivref ivtemp six stage conversion pipeline six digital comparators six digital result registers reference selection vrefh vrefl avdd sample and hold 1 dedicated an1 an46 an6.
Pipelined adc with four 3 bit stages each stage resolves two bits.
12 bit pipelined anal og to digital converter adc 12 bit pipelined analog to digital converter adc 18 figure 18 1. Two bits are required to obtain 1 5 bits and therefore 18 bits of raw output are available for digital error correction. The pipelined adc had its origins in the subrangingarchitecture which was first used in the 1950s as a means to reduce the component count and power in tunnel diode and vacuum tube flash adcs see references 1 2. Generic pipeline adc block diagram.
