Dual Slope Adc Circuit Diagram. Dual slope adc architecture a dual slope adc ds adc integrates an unknown input voltage vin for a fixed amount of time tint then de integrates tdeint using a known reference voltage vref for a variable amount of time see figure 2. Equivalent circuits 6 193 the graphs 6 194 the main body 6 198 circuit description 6 198.
A conventional dual slope analog to digital converter adc is illustrated in fig. Dual slope type adc. Integrator comparator clock signal generator control logic and counter.
In the days when analog integrated circuits were cheaper and more familiar to designers than digital circuits the dual slope adc was the choice for inexpensive multimeters anything that didn t require high speed and.
A dual slope adc on the other hand averages together all the spikes and dips within the integration period thus providing an output with greater noise immunity. Sign in to download full size image. Dual slope adcs are used in applications demanding high accuracy. The working of a dual slope adc is as follows.
