Circuit Diagram Of And Gate Using Cmos. The circuit output should follow the same pattern as in the truth table for different input combinations. If both of the a and b inputs are high then both the nmos transistors bottom half of the diagram will conduct neither of the pmos transistors top half will conduct and a conductive path will be established between the output and vss ground bringing the output low.
The circuit diagram of the two input cmos nand gate is given in the figure below. Both are controlled by the same input signal input a the upper transistor turning off and the lower transistor turning on when the input is high 1 and vice versa. The n net consisting of two series connected nmos transistor creates a conducting path between the output node and the ground if both input voltages are logic high.
The principle of operation of the circuit is exact dual of the cmos two input nor operation.
If both of the a and b inputs are high then both the nmos transistors bottom half of the diagram will conduct neither of the pmos transistors top half will conduct and a conductive path will be established between the output and vss ground bringing the output low. A basic cmos structure of any 2 input logic gate can be drawn as follows. The above drawn circuit is a 2 input cmos nand gate. For example here is the schematic diagram for a cmos nand gate.
