Analog Comparator Vs Adc. Enabling the adc only when required analog voltage higher than a threshold dramatically reduces the average. The adc the chip has however can take input from almost every pin on the 20 pin chip.
As it counts the analog output of the dac increases or ramps up. Instead of using the comparators in a flash adc only once during a ramp input signal the folding adc re uses the comparators multiple times. Figure 2 depicts block diagram of parallel comparator adc or 2 bit flash adc.
There is a power penalty as the reference voltage and comparator have to be powered on.
A sampling phase or acquisition period and a conversion phase. Enabling the adc only when required analog voltage higher than a threshold dramatically reduces the average. Comparator works in sleep mode. When the sensor output is lower than the threshold the mcu re enters the low power mode to save battery life.
